convolution, implicit GEMM, cuDNN, layout
Convolution and Implicit GEMM
REFERENCE CONTEXT · CUDA 12.2; RTX 2070 SUPER; Turing sm_75
Core Concept
Convolution can map to GEMM, but explicit im2col materializes a large matrix. Implicit GEMM generates coordinates inside the kernel while reusing tiles.
Why It Affects Performance
Avoiding im2col writeback and reread reduces memory use and bandwidth, although boundaries, stride, dilation, layout, and channel counts affect mapping efficiency.
Example or Pseudocode
C[m,n] += A[m,k] * B[k,n]
m maps batch/output positions, n maps output channels, and k maps input channels and filter locations.
Coordinates are generated while loading tiles; no full im2col tensor is stored.Profiling and Performance Judgment
Use cuDNN as a baseline and inspect algorithm selection, workspace, NHWC/NCHW conversion kernels, Tensor Core instructions, and end-to-end layout copies.
Five-Minute Exercise
Why can explicit im2col slow a 3x3 convolution?
Show answer
Input values are duplicated in a large intermediate matrix, adding memory allocation, writes, and reads. Implicit GEMM generates required values on chip.